A conventional display device such as a liquid crystal display device, a plasma display device, etc., includes a plurality of pixel electrodes disposed in a matrix form, counter electrodes facing these pixel electrodes, and a display medium (liquid crystal, plasma, etc., ) sealed between the pixel electrodes and the counter electrodes. The described display device selectively applies a voltage to the pixel electrodes to form a display pattern on a screen. Further, by applying a voltage between the selected pixel electrode and the counter electrode, the brightness of the display medium is optically modulated by the display data to visualize the display pattern.
For the method of driving the pixel electrodes, a so-called active-matrix driving system is known wherein switching elements are connected to respective pixel electrodes disposed in a matrix form and the pixel electrodes are respectively driven by the switching elements. For the switching element, a TFT (thin-film transistor), and an MIM (metal-insulator-metal) element, etc., are generally known. On the other hand, the pixel electrodes are typically formed on the substrate in the same layer as signal lines, scanning lines (bus lines) in such a manner that they do not contact the signal lines or the scanning lines.
Additionally, the technique of forming pixel electrodes on a different layer from the bus lines by disposing the pixel electrodes on an insulting film is proposed (Japanese Laid-Open Patent Application No. 156025/1986 (Tokukaisho 61-156025). In the described arrangement, as the pixel electrodes and the bus lines are formed on different layers, an increased area of the pixel electrodes (aperture ratio) can be achieved.
The liquid crystal display device adopting the matrix-type substrate always faces a problem of a disconnection of wire due to a defect generated in the manufacturing process. In order to suppress the generation of such disconnection defect, the active-matrix type liquid crystal display device which adopts double bus lines has been proposed (SID '95 DIGEST of TECHNICAL PAPERS 4: AMLCDs 4.3; "High-Aperture and Fault-Tolerant Pixel Structure for TFT-LCDs").
As shown in FIG. 14, the described active-matrix type liquid crystal display device is arranged such that two scanning lines 52 and 52' are formed for each pixel electrode 51, and the scanning lines 52 and 52' are short-circuited by short-circuit lines 54 formed along signal lines 53 on both sides of the pixel electrode 51. The short-circuit lines 54 are superimposed on the pixel electrode 51 via an insulating film (not shown), and an overlapped portion functions as an auxiliary capacitance. In the described arrangement, as a TFT 55 is driven by the two scanning lines 52 and 52', even if a disconnection occurred in one of the scanning lines 52 and 52', an application of the gate voltage to the TFT 55 can be ensured through the short-circuit lines 54.
In general, in order to prevent light from leaking through a gap formed between the pixels, a light-shielding pattern is formed on the side of the counter electrodes. In the described arrangement, however, the pixel electrode 51 and the short-circuit lines 54 are superimposed in a direction perpendicular to the substrate. Therefore, the short-circuit lines 54 form a part of the light-shielding pattern.
The arrangement where the pixel electrode and the signal line are superimposed via the insulating film will be explained.
In the arrangement shown in FIG. 15, peripheral portions on both sides of the pixel electrodes 51 are superimposed on the scanning lines 52 and the signal lines 53. As shown also in FIG. 16, at a central portion below the pixel electrode 51, formed is an auxiliary capacitance electrode (hereinafter referred to as Cs electrode) 56. The Cs electrode 56 is formed on a gate insulating film 57 used in common with the TFT 55 (see FIG. 15). The Cs electrode 56 is in contact with a contact portion 51a of the pixel electrode 51.
On a substrate 58 made of glass, formed is an auxiliary capacitance line 59. The gate insulating film 57 is formed so as to cover the auxiliary capacitance line 59. On both sides of the Cs electrode 56 on the gate insulating substrate 57, lower signal lines 60 are formed, and further, signal lines 53 are formed thereon. The lower signal lines 60 and the signal lines 53 are covered with an insulating substrate 61.
In the described arrangement, as the insulating film 61 is formed between the pixel electrode 51 and the signal lines 53, an increased area of the pixel electrode 51 can be obtained irrespectively of the disposed positions of the signal lines 53.
The arrangement shown in FIG. 17 includes the Cs electrode 56 having the same structure as that of the aforementioned arrangement of FIG. 15, except that the Cs electrode 56 is connected to a drain electrode 62 through a connection line 63. The arrangements shown in FIG. 15 and FIG. 17 both have the Cs-on-Common structure wherein an auxiliary line capacitance is formed by disposing the Cs electrode 56 on the common auxiliary capacitance line 59 which is used in common among all the pixels.
On the other hand, the arrangement shown in FIG. 18 has the Cs-on-Gate structure wherein an auxiliary capacitance is formed by disposing the Cs electrode 56 on the scanning line 52 of an adjacent pixel. In this arrangement, the Cs electrode 56 is connected to a contact portion 51b of the pixel electrode 51.
In the arrangement shown in FIG. 19, the Cs electrode 56 is connected to the drain electrode 62 through the connection line 63.
With a demand for higher definition and higher aperture ratio, there is a tendency of reducing the width of the bus line while increasing the number of the bus-line crossing parts, which increases a disconnection of a bus-line or a leakage at a portion where the bus-lines are crossed. Furthermore, such disconnection of bus-line, or the leakage at the crossing point causes a problem that a voltage cannot be applied properly to the pixel electrode connected to the disconnected bus line. Therefore, the portion where the voltage is not applied appears as a line-shaped defect on the display screen. In the display element, such line-shaped defect is a serious problem, and a display device having such line-shaped defect is considered as an inferior good. Further, an increase in such inferior goods would lower the yield of the display device, thereby increasing a manufacturing cost.
Furthermore, when the described arrangement of adopting the double bus line is applied to the general arrangement where the pixel electrode and the bus line are formed in the same layer, as the pixel electrode is formed in the same layer as the bus line, an increased area of the pixel electrode cannot be obtained, thereby hindering an improvement of the aperture ratio. Although a small improvement in aperture ratio can be achieved by reducing an interval between the wires; this would causes the problem that a leakage between the wires is likely to occur.
In the arrangements shown in FIG. 15 through FIG. 19, it is permitted to arrange such that the pixel electrode 51 and the data electrodes 53 are superimposed. However, the capacitance between the pixel electrode 51 and the signal line 53 cannot be made smaller due to the insulating film 61 formed therebetween. Therefore, the problem of generating crosstalk due to the capacitance, which would lower the display quality remains unsolved.